View VNB49N04_2782113.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

? october 1999 1/14 vnp49n04fi / VNB49N04 / vnv49n04 omnifet: fully autoprotected power mosfet 1 n linear current limitation n thermal shut down n short circuit protection n integrated clamp n low current drawn from input pin n diagnostic feedback through input pin n esd protection n direct access to the gate of the power mosfet (analog driving) n compatible with standard power mosfet description the vnp49n04fi, VNB49N04, vnv49n04 are monolithic devices designed in stmicroelectronics vipower m0 technology, intended for replacement of standard power mosfets from dc up to 50khz applications. built-in thermal shutdown, linear current limitation and overvoltage clamp protect the chip in harsh environments. fault feedback can be detected by monitoring the voltage at the input pin. type v clamp r ds(on) i lim vnp49n04fi VNB49N04 vnv49n04 42 v 20 m w 49 a powerso-10 tm to-263 (d2pak) order codes: isowatt220 vnp49n04fi powerso-10 tm vnv49n04 to-263 (d2pak) VNB49N04 1 10 1 2 3 1 3 isowatt220 overvoltage gate linear drain source clamp current limiter control over temperature input block diagram status
2/14 vnp49n04fi / VNB49N04 / vnv49n04 absolute maximum rating connection diagram (top view) symbol parameter value unit powerso-10 tm d2pak isowatt220 v ds drain-source voltage (v in =0v) internally clamped v v in input voltage 18 v i d drain current internally limited a i r reverse dc output current -50 a v esd electrostatic discharge (r=1.5k w , c=100pf) 2000 v p tot total dissipation at t c =25c 125 125 40 w t j operating junction temperature internally limited c t c case operating temperature internally limited c t stg storage temperature -55 to 150 c 1 1 2 3 4 5 6 7 8 9 10 11 drain source source n.c. source source input input input input input powerso-10 tm d2pak source drain input 3 2 1 3 2 1 input drain source isowatt220
3/14 vnp49n04fi / VNB49N04 / vnv49n04 thermal data electrical characteristics (-40c < t j < 125c, unless otherwise specified) off on (*) dynamic switching (**) symbol parameter value unit powerso-10 d2pak isowatt220 r thj-case thermal resistance junction-case }}} max 1 1 3.12 c/w r thj-amb thermal resistance junction-ambient max 50 62.5 62.5 c/w symbol parameter test conditions min typ max unit v clamp drain-source clamp voltage i d =200 ma; v in =0 34 42 50 v v clth drain-source clamp threshold voltage i d =2ma; v in =0 33 v v incl input-source reverse clamp voltage i in = -1ma -1.2 -0.1 v i dss zero input voltage drain current (v in =0v) v ds =13v; v in =0v v ds =25v; v in =0v 70 220 m a m a i iss supply current from input pin v ds =0v; v in =10v 250 550 m a symbol parameter test conditions min typ max unit v in(th) input threshold voltage v ds =v in; i d + i in =1ma 0.8 3 v r ds(on) static drain-source on resistance v in =10v; i d =25a v in =5v; i d =25a 0.04 0.05 w w symbol parameter test conditions min typ max unit g fs (*) forward transconductance v ds =13v; i d =25a; t c =25c 25 30 s c oss output capacitance v ds =13v; f=1mhz; v in =0v; t c =25c 1100 1500 pf symbol parameter test conditions min typ max unit t d(on) turn-on delay time v ds =15v; i d =25a v gen =10v; r gen =10 w (see figure 3) 200 600 ns t r rise time 1300 3600 ns t d(off) turn-off delay time 800 2400 ns t f fall time 300 900 ns t d(on) turn-on delay time v ds =15v; i d =25a v gen =10v; r gen =1000 w (see figure 3) 1.3 3.8 m s t r rise time 3.8 10.4 m s t d(off) turn-off delay time 12 24 m s t f fall time 6.1 17 m s (di/dt) on turn-on current slope v ds =15v; i d =25a v in =10v; r gen =10 w 25 a/ m s q i total input charge v ds =15v; i d =25a; v in =10v 100 nc 1
4/14 vnp49n04fi / VNB49N04 / vnv49n04 source drain diode protections (*) pulsed: pulse duration = 300 m s, duty cycle 1.5% (**) parameters guaranteed by design/characterization symbol parameter test conditions min typ max unit v sd (*) forward on voltage i sd =25a; v in =0v 1.8 v t rr (**) reverse recovery time i sd =25a; di/dt=100a/ m s v ds =30v; t j =25 c (see test circuit, figure 5) 250 ns q rr (**) reverse recovery charge 910 nc i rrm (**) reverse recovery current 7.5 a symbol parameter test conditions min typ max unit i lim drain current limit v in =10v; v ds =13v v in =5v; v ds =13v 28 28 49 49 70 70 a a t dlim (**) step response current limit v in =10v v in =5v 35 90 50 150 m s m s t jsh (**) overtemperature shutdown 150 c t jrs (**) overtemperature reset 135 c i gf (**) fault sink current v in =10v; v ds =13v v in =5v; v ds =13v 50 20 ma ma e as (**) single pulse avalanche energy starting t j =25c; v ds =20v v in =10v; r gen =1k w; l=6mh 4j 2
5/14 vnp49n04fi / VNB49N04 / vnv49n04 protection features during normal operation, the input pin is electrically connected to the gate of the internal power mosfet. the device then behaves like a standard power mosfet and can be used as a switch from dc up to 50khz. the only difference from the users standpoint is that a small dc current (i iss ) flows into the input pin in order to supply the internal circuitry. the device integrates: - overvoltage clamp protection: internally set at 42v, along with the rugged avalanche characteristics of the power mosfet stage give this device unrivalled ruggedness and energy handling capability. this feature is mainly important when driving inductive loads. - linear current limiter circuit: limits the drain current i d to i lim whatever the input pin voltage. when the current limiter is active, the device operates in the linear region, so power dissipation may exceed the capability of the heatsink. both case and junction temperatures increase, and if this phase lasts long enough, junction temperature may reach the overtemperature threshold t jsh . - overtemperature and short circuit protection: these are based on sensing the chip temperature and are not dependent on the input voltage. the location of the sensing element on the chip in the power stage area ensures fast, accurate detection of the junction temperature. overtemperature cutout occurs at minimum 150c. the device is automatically restarted when the chip temperature falls below 135c. - status feedback: in the case of an overtemperature fault condition, a status feedback is provided through the input pin. the internal protection circuit disconnects the input from the gate and connects it instead to ground via an equivalent resistance of 100 w. the failure can be detected by monitoring the voltage at the input pin, which will be close to ground potential. additional features of this device are esd protection according to the human body model and the ability to be driven from a ttl logic circuit (with a small increase in r ds(on) ). 1
6/14 vnp49n04fi / VNB49N04 / vnv49n04 1 thermal impedance for isowatt220 thermal impedance for d2 pak / powerso-10 derating curve output characteristics transconductance static drain-source on resistance vs input voltage
7/14 vnp49n04fi / VNB49N04 / vnv49n04 1 static drain-source on resistance static drain-source on resistance input charge vs input voltage capacitance variations normalized input threshold voltage vs temperature normalized on resistance vs temperature
8/14 vnp49n04fi / VNB49N04 / vnv49n04 1 normalized on resistance vs temperature turn-on current slope turn-on current slope turn-off drain-source voltage slope turn-off drain-source voltage slope switching time resistive load
9/14 vnp49n04fi / VNB49N04 / vnv49n04 1 switching time resistive load switching time resistive load current limit vs junction temperature step response current limit source drain diode forward characteristics
10/14 vnp49n04fi / VNB49N04 / vnv49n04 1 fig. 1: unclamped inductive load test circuits fig. 2: unclamped inductive waveforms fig. 3: switching time test circuits for resistive load fig. 4: input charge test circuit fig. 5: test circuit for inductive load switching and diode recovery times fig. 6: waveforms
11/14 vnp49n04fi / VNB49N04 / vnv49n04 1 dim. mm. inch min. typ max. min. typ. max. a 4.4 4.6 0.173 0.181 b 2.5 2.7 0.098 0.106 d 2.5 2.75 0.098 0.108 e 0.4 0.7 0.015 0.027 f 0.75 1 0.030 0.039 f1 1.15 1.7 0.045 0.067 f2 1.15 1.7 0.045 0.067 g 4.95 5.2 0.195 0.204 g1 2.4 2.7 0.094 0.106 h 10 10.4 0.393 0.409 l2 16 0.630 l3 28.6 30.6 1.126 1.204 l4 9.8 10.6 0.385 0.417 l6 15.9 16.4 0.626 0.645 l7 9 9.3 0.354 0.366 3 3.2 0.118 0.126 isowatt220 mechanical data l2 a b d e h g l6 f l3 g1 123 f2 f1 l7 l4
12/14 vnp49n04fi / VNB49N04 / vnv49n04 dim. mm. inch min. typ max. min. typ. max. a 4.30 4.60 0.169 0.181 a1 2.49 2.69 0.098 0.106 b 0.70 0.93 0.027 0.036 b2 1.25 1.4 0.049 0.055 c 0.45 0.6 0.017 0.023 c2 1.21 1.36 0.047 0.053 d 8.95 9.35 0.352 0.368 e 10 10.28 0.393 0.404 g 4.88 5.28 0.192 0.208 l 15 15.85 0.590 0.625 l2 1.27 1.4 0.050 0.055 l3 1.4 1.75 0.055 0.068 to-263 (d2pak) mechanical data l2 l3 l b2 b g e a c2 d c a1 det ail "a" det ail "a" a2
13/14 vnp49n04fi / VNB49N04 / vnv49n04 1 1 dim. mm. inch min. typ max. min. typ. max. a 3.35 3.65 0.132 0.144 a1 0.00 0.10 0.000 0.004 b 0.40 0.60 0.016 0.024 c 0.35 0.55 0.013 0.022 d 9.40 9.60 0.370 0.378 d1 7.40 7.60 0.291 0.300 e 9.30 9.50 0.366 0.374 e1 7.20 7.40 0.283 0.291 e2 7.20 7.60 0.283 300 e3 6.10 6.35 0.240 0.250 e4 5.90 6.10 0.232 0.240 e 1.27 0.050 f 1.25 1.35 0.049 0.053 h 13.80 14.40 0.543 0.567 h 0.50 0.002 q 1.70 0.067 a 0o 8o 1 1 detail "a" plane seating a l a1 f a1 h a d d1 = = = = = = e4 0.10 a e1 e3 c q a = = b b detail "a" seating plane = = = = e2 6 10 5 1 e b he m 0.25 = = = = powerso-10 ? mechanical data
14/14 vnp49n04fi / VNB49N04 / vnv49n04 information furnished is believed to be accurate and reliable. however, stmicroelectronics assumes no responsibility for the co nsequences of use of such information nor for any infringement of patents or other rights of third parties which may results from its use. no license is granted by implication or otherwise under any patent or patent rights of stmicroelectronics. specifications mentioned in this p ublication are subject to change without notice. this publication supersedes and replaces all information previously supplied. stmicroelectron ics products are not authorized for use as critical components in life support devices or systems without express written approval of stmicr oelectronics. the st logo is a trademark of stmicroelectronics ? 1999 stmicroelectronics - printed in italy- all rights reserved. stmicroelectronics group of companies australia - brazil - canada - china - france - germany - italy - japan - korea - malaysia - malta - mexico - morocco - the netherlands - singapore - spain - sweden - switzerland - taiwan - thailand - united kingdom - u.s.a. http://www.st.com

▲Up To Search▲

Price & Availability of VNB49N04

	To Download VNB49N04 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .